Pipeline performance (contd.)

• Design1:

Average instruction execution time = clock cycletime * CPI

= 10ns * (4 *0.4 + 4 *0.2+ 5*0.4) = 10 *(1.6+0.8+2.0)

= 44ns

• Design 2:

Average instruction time st steady state is clock cycle time:

= 10ns + 1ns (for setup and clock skew) = 11ns

• Speed up = 44/11 = 4

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