VLSI Testing Group

Current research in this area includes the development of techniques for on-chip test generation, random testing of sequential circuits, mixed-signal circuit diagnosis, memory testing and built-in self test perspective on memory synthesis.

The following projects are currently underway:

• Defect analysis of multiport memories and new fault models

• Testing and diagnosis issues in System-On-Chips

• Enhancements to IBM's TestBench tool

• Random testing using Hold Method and BIST implications